Logic circuit



Dec. 6, 1966 J. P. SWEENEY 3,290,513

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JOSEPH P SWEENEY Dec. 6, 1966 J. P. SWEENEY 3,

LOGIC CIRCUIT Filed May 24, 1963 2 Sheets-Sheet 2 O\ OUTPUT OUTPUT s rADV E INPUT TO 0'; OUTPUT r E411 Ex DYNAMl ourP T INVENTOR.

Jose PH 1? SWE ENE) BY magnetic cores and the like.

United States Patent 3,290,513 LOGIC CIRCUIT Joseph I. Sweeney,Harrisburg, Pa., assignor to AMP Incorporated, Harrisburg, Pa. Filed May24, 1963, Ser. No. 282,918 18 Claims. (Cl. 307-88) This inventionrelates to an improved magnetic core device useful in performing logicalfunctions and particularly to a device operable with MADR(multi-a-perture device resistance) systems of the type shown in US.Patent No. 2,995,731, to the inventor.

The logical function termed negation operates with respect to thetransfer of binary intelligence in the form of one and zero to produce agiven output which is the complement of a given input. Thus, thenegation device will produce a zero responsive to a one input and willproduce a one responsive to a zero input. The frequent use of thenegation function in logic systems has sponsored the development of awide variety of negation devices employing solid state componentsincluding transistors, More often than not, the negation devices of theprior art are quite complicated with respect to number of components andpulse requirements.

One approach of the prior art has been to utilize specially shapedmagnetic cores which must be manufactured by hand in order to achievethe core geometry necessary to perform the negation function. Anotherapproach has been to use magnetic cores in conjunction with unilateraltransfer elements such as diodes, accepting at the same time a unit morecostly and less reliable than the remaining components of the system.Ye-t another approach employs standard magnetic colres, but calls foradditional peripheral pulse sources over and above the pulse sourcesavailable for the operation of the basic system.

Accordingly, it is one object of the present invention to provide anegation circuit comprised of standard magnetic cores and conductiveWire only, which circuit is adapted to be driven by a cycle of pulsesavailable in the system in which the device is used.

It is a further object of invention to provide a simple and inexpensivenegation circuit utilizing only two magnetic cores and conductive wire.

It is another object of invention to provide a magnetic core negationcircuit fully compatible in range of operation with standard MADRsystems.

It is yet another object of invention to provide a novel negationcircuit having distinctive outputs with respect to intelligencediscrimination.

The foregoing objects are attained by the present invention through theuse of one multi-aperture core, a single small toroidal core and areceiver core in conjunction with windings supplied by the standardadvance and prime circuits of a MADR system. The multi-aperture,toroidal and receiver cores are linked by a coupling iloop each in arespective sense to produce, responsive to standard advance pulses, anoutput from the receiver core which is the complement of the input tothe multiaperture core. The device of the invention may be incorporatedinto any standard MADR system by the inclusion of but two additionalcores, a single coupling loop appropriately threading the last core ofthe system and threading the two additional cores, and withcontinuations of the standard advance circuits of the systemappropriately wound through the two additional cores. The circuit of theinvention employs only magnetic material and copper wire and therebyachieves the degree of reliability with respect to component failureachieved by standard MADR units. The particular windings employed in theunit of the invention are such as to permit the unit to achieve therange of operation of the standard MADR device and to produce outputpulses representative of binary intelligence having a literally infinitedegree of discrimination between one and zero with the output pulsesbeing of a sufficient current level to operate the usual utilizationdevices employed and driven by standard MADR systems.

Other objects and attainments of the present invention will becomeapparent to those skilled in the art upon a reading of the followingdetailed description when taken in conjunction with the drawings inwhich there are shown and described illustrative embodiments of theinvention; it is to be understood, however, that these embodiments arenot intended to be exhaustive nor limiting of the invention, but aregiven for purpose of illustration in order that others skilled in theart may fully understand the invention and the principles thereof andthe manner of applying it in practical use so that they may modify it invarious forms, each as may be best suited to the conditions of aparticular use.

In the drawings:

FIURE l is a schematic diagram of the negation unit showing the coresand windings appropriately wound therethrough;

FIGURE 2 is a diagram of the sequence of operation including the variousmagnetic states and flux unit outputs achieved as the unit of theinvention performs a sample series of negation functions;

FIGURE 3 is a schematic diagram showing duplicate output circuits toprovide two outputs with different discrimination;

FIGURE 4 is a diagram of the pulses produced at the duplicate outputs ofthe circuit of FIGURE 3; and

FIGURE 5 is a diagram showing a portion of a circuit similar to that ofFIGURE 1, but including additional outputs.

The device depicted in FIGURE 1 may be considered as a separate entityrepackaged for incorporation and use with any standard MAD-R system orit may be considered as directly incorporated into a standard MADRsystem with the left hand multi-aperture core being any odd core of ashift register or other such MADR unit. The cores shown in FIGURE 1 areof saturable magnetic material of the type having a relatively squarehysteresis characteristic loop. Cores 1t) and 16' each have asymmetrically disposed central aperture 12 and four minor apertures 14,centrally disposed in the core body to define equal cross-sectionalareas of magnetic material on either side of the apertures. Theinclusion of the bulges .or ears along the outsideof each minor apertureassures that the cross-sectional area of core material through a sectionof any aperture is substantially equal to the cross-sectional area ofthe body of the core apart from the minor apertures. For the purpose ofexplanation, two of the minor apertures have been labeled R and T torepresent receiver and transmitter apertures, respectively. Theremaining two apertures are not shown as utilized, but may,alternatively, be used as input or readout apertures in practice. Cores10 are of a type manufactured and sold by the Indiana GeneralCorporation of Valparaiso, Indiana, utilizing their magnetic materialNo. 5209. Further included is a core 11, having a single centralaperture and a thickness to define a flux capacity substantially equalto the flux capacity of the outer leg adjacent the minor aperture ofcore 10. Core 11 is of the same material as cores It) and 10, in orderto achieve a similar response relative to operational changes in thepresence of temperature changes. As Will be hereinafter demonstrated,core 11 may alternatively be replaced by a plurality of smaller coreshaving net flux content equal to that of core 11, and core 10' mayalter- J natively be replaced by a single toroid of a flux capacityequal to that of core 11.

The various leads forming the driving windings and transfer loops of thecircuit of FIGURE 1 are of Forrnvar insulated solid copper wire. Thevarious turns N, linking portions of the cores, are shown onlyschematically in FIGURE 1, in manner of application and number. Suchturns should be applied fairly tightly about the core portions linkedthereby with care being taken not to penetrate the insulation thereof.

Linking each of the cores 10, 10" and 11, are leads 20 and 22 formingthe advance portion of the circuit. Leads 20 and 22 are supplied bystandard ADV. O and ADV. E pulses of current I from any suitable source.A prime lead 24 is included, threading the core Ill as shown. Primecurrent pulses I for lead 24 may be developed from any suitable sourceor, alternatively, may be supplied from a DC. source. Linking cores 10,10 and 11 is a reset lead 23 adapted to be energized by a pulse similarto I on command as by closure of a switch 25 connected to a suitablepulse source. The switch 25 is, of course, a schematic representationand would normally be a solid state device.

The operation of the advance and prime circuits is, as generallyexplained in the above mentioned Sweeney application, such as tosequentially provide a clearing M.M.F., N I N I followed by a primingM.M.F., N I to the core denominated followed by the application of aclearing M.M.F., N I (N =N +N to the core denominated E. This standardMAD-R cycle includes a pulse spacing permitting an input to the coredenominated 0 following or during each ADV. E pulse. The reset lead 23includes turns and a current supply to provide M.M.F.s sufficient toclear cores 0 and E", i.e. equal to N I With respect to the O and Ecores, the terms clear and set are used in accordance with theconventional representation of full negative saturation and halfnegative, half positive saturation (a full MAD set), respectively.

' As will be apparent from the circuit in FIGURE 1, both ADV. O and ADV.E pulses will also produce M.M.F.s operating on the core denominated A.Core A will thus experience M.M.F.s, N I N I responsive to each ADV. Oand ADV. E pulse, respectively. Core A will thus be cleared by theapplication of the ADV. 0 pulse through turns N and set responsive tothe application of the ADV. E pulse through turns N using theconventional representation of clear as related to full negativesaturation and using set as related to full positive saturation withrespect to core A. Lead 23 couples A in a sense to set the core by ansimilar to N I Further linking the cores are transfer or coupling loops26, 2S and 30. Loop 26, which may be either from a preceding core orsome other input device, couples core 0 by receiver turns N threadingthe R aperture 14 and aperture 12 to serve as an input loop. Theapplication of an input i will operate to set core 0 if the current i isof a level sufficient to define a one input, through the N i Couplingloop 30 links the major leg of core E by transmitting turns N to respondto flux changes in the core to produce an output pulse i from therepresentative of the intelligence state of the core. Coupling loop 28links cores 0, E and A including, turns N coupling the outer legadjacent transmitting aperture T of core 0, the inner leg of core Ethrough receiver aperture R thereof by turn N and the body of core A byturns N The senses of turns N and N linking the cores 0, E, A are suchas to provide current i developed by the flux switched in the outer legadjacent aperture T by the application of ADV. O

and currents i and i which are in senses dependent upon the orientationof flux switched by ADV. O and ADV. E in core A.

Considering that the flux capacity of each of the legs encircled bycoupling loop 28 is substantially the same and that the rate of fluxchange is substantially the same responsive to identical M.M.F.s N I N Ipermits normalizing the units of flux developed under each of the turnsN and N for the purpose of explanation. Consider, for example, that ittakes one unit of flux operating on the core material about R by turns Nto set core E and consider that flux losses (air and impedance losses)occurring in loop 28 are ignored, the quantity of flux necessarilyswitched in the outer core leg adjacent T may considered as a unit ofone. The quantity of flux switched under N, linking core A may also bebe considered as normalized one, 41 :1.

With this consideration, the operation of the circuit of FIGURE 1 maynow be reviewed. The schedule called out in FIGURE 2 is intended toexemplify the operation of the circuit of FIGURE 1, wherein for each oneinput to core 0 there will occur in an advance cycle an output from coreE equal to the exact complement of the input signal. Thus, if through Ni a one is transferred into core 0, a current i substantially equal tozero will be generated .in winding 30 during the ADV. 0 phase. If N irepresents a zero level input, an output pulse of a current level iequal to one will be developed on output loop 30 during the applicationof ADV. O.

For the purpose of clarity in describing the operation of FIGURE 1, theprime phase of the advance cycle is left out, it being understood thatpreceding each ADV. 0 phase, a prime pulse or DC. prime current I willbe supplied to generate an M.M.F., N I which will switch the flux in theouter leg adjacent aperture T If the core 0 is set, the application of NI will operate to prime the 0 core. If the 0 core is not set, theapplication of N I will not operate to disturb the core, the quantity ofN I being maintained below the core set threshold.

In FIGURE 2 distinct sequential inputs of zero-oneone-zero are selectedto explain the operation of the circuit of FIGURE 1. In conjunction witheach of these inputs, the sense of M.M.F applied and the resultantstates of O, A and E cores are depicted along with the normalized fluxunits transmitted from each core. The output for each of the select-edinputs is also shown.

Considering now that the reset lead 23 has been energized and the cores0, A and E are in the initial state of clear, set and clear,respectively, the application of a zero on lead 26 will not disturb core0 and the cores will remain in the initial states shown in FIGURE 2. Thefollowing ADV. O'will operate to clear core A and will, of course,operate to drive core 0 further into negative saturation. As indicatedin FIGURE 2, clearing of core A by the application of ADV. 0 willoperate to generate a normalized unit of flux equal to one =1) switchedto produce a current flow in winding 28 in the direction shown by thecurrent i which is in a sense to set c-ore E and produce an output onwinding 30 of one due to the flux switched under loop 30. Theintelligence state of cores 0 and E will then be zero and one,respectively. Core A may be considered to have generated a one notpresent in the intelligence train fed into core 0. Thus, core A may beconsidered as a source of flux, or a source core.

The application of ADV. B will operate to set core A and clear core E.The flux switched under winding N of lead 30 during ADV. E time willproduce a current opposite to the i shown, which will normally beblocked by a unilateral device or by the characteristics of theutilization device.

Considering now the case of a one input on winding 26; with the cores instates previously established core 0 will then be set; cores A and Eremaining set and clear, respectively. The application of ADV. O onwinding will result in states with core 0 being cleared, core A beingcleared and core E remaining cleared. The clearing of cores 0 and A willresult in each such core producing a flux unit output of one, =1, =L Therelative sense of turns N on cores 0 and A will produce resultingcurrents i and i opposing each other in coupling loop 28 and of equalquantity to thus cancel the effect of the transfer of the one from core0 to core E. Core E will then re main in the clear state and the outputloop will produce an output current i of zero level. The following ADV.B will drive the cores into the states shown in FIGURE 2 of clear, setand clear, respectively.

Following the operation of the circuit shown in FIG- URE 1 further inthe schedule of FIGURE 2 shows that the input of a one following a onewill produce states in the respective cores of set, set and clear. Theapplication of ADV. 0 will produce states of clear, clear and clear,With normalized units of flux of one being developed at cores 0 and A.The cancellation, as above described, will be repeated such that core Eis not set and an output on loop 3!) of i equal to zero will result. Theapplication of ADV. B will then drive the cores into the respectivestates of clear, set and clear.

The following application of a zero input will leave the cores in statesof clear, set, clear. The application of ADV. 0 will operate to drivethe cores into the states of clear, clear and set; core A producing anormalized one flux output to core E and thereby a one output from thecircuit. The application of ADV. E will then drive the cores into clear,set and clear states, whereupon the device is prepared for the nextcycle.

As will be apparent from the above description, core A is swiched backand forth from the clear to the set state, and visa versa by theapplication of ADV. O and ADV. E. It will be perceived that the corewill accordingly produce a normalized flux output of one as it goes fromthe clear to the set state and from the set to the clear state. Thesenses of the turns N and N are not such as to prevent core 0 from beingdisturbed by the flux change occurring when core A is driven from theclear to the set state by ADV. E. Thus, as core A is driven into the setstate, a flux unit of one and a current i will be produced, operatingthrough turns N on core 0. This might result in core 0 being set sincethe current i is in the proper sense to drive the core into positivesaturation. This is particularly true when DC. prime is being used,since N I tends to aid N i in disturbing O. The turns N formed from lead22 of ADV. E circuit are, however, in a sense, with respect to the corematerial about T to supply an M.M.F. opposing the developed by i AE andin phase therewith to block core 0 from being set. Turns N will, ofcourse, have no effect on the ability of core 0 to transmit, since thetransmission phase of the 0 core occurs during ADV. O. The turns N willalso prevent core 0 being disturbed when E is driven from the set to thecleared state.

While the particular output has been shown as developed during ADV. O, afurther output may be obtained from the E core by the addition of acoupling loop threading any of the unused minor apertures 14, such as Tin standard MAD-R fashion. In such event, the ADV. E, lead would bethreaded through T to provide turns N as shown with respect to turns Nthrough aperture T of core 0. The prime lead would also be threadedthrough aperture T in a sense to provide N turns as shown with respectto core 0. With this modification, the E core could therefore serve asany E core of a series of cores in a shift register or like device toprovide a transfer of the intelligence state of the core. The particularcurrent developed would, of course, occur during normal ADV. E time andwould be in an opposite sense to the i shown; being developed in theouter leg adjacent aperture T as E is cleared. It is cointemplated that,in addition to providing a dynamic output as above described, anadditional static output could be provided at any available E core minoraperture utilizing the RF readout scheme as shown in US. patentapplication, Serial Number 249,466, filed January 4, 1963, in the nameof the inventor and J. C. Mallinson. FIGURE 5 depicts the foregoing moreclearly.

From the operational sequence shown in FIGURE 2, it should be apparentthat the reset lead 23 is necessary only to establish the initial statesof clear, set and clear in the cores 0, A and E and that once thesestates are established the reset circuit could be dispensed with,insofar as the operation thus far described is concerned. In fact, ifthe cores 0, A and E are separately driven to the initial states by somesuitable temporarily placed windings, many circuit applications would besatisfied without a reset lead such as winding 23. The importance oflead 23 is in systems wherein there is a requirement for output from an0 core within half an advance cycle when there has been no precedingADV. E phase; i.e. in systems wherein the 0 core is supplied from atransistor or similar source either not requiring ADV. E or occurringbefore the first ADV. E pulse as, for example, when a device is firstenergized.

Turning now to a further aspect of the circuit of the invention, FIGURE3 shows an embodiment adapted to produce two outputs which are each thecomplement of a single input. This circuit is generally identical tothat shown in FIGURE 1, with the output portion thereof duplicated.

' The operation of the circuit is also generally identical to that ofthe circuit shown in FIGURE 1, with respect to cycle of operationincluding input, prime, advance and output phases.

Included in the circuit of FIGURE 3, are three cores 1h, 10 and It) ofthe type heretofore described and two cores 11 and 11', core 11 beingidentical to the core 11 heretofore described and core 11' being of thesame magnetic material, but slightly smaller than core 11. The cores arearranged and labeled 0 A A2, E and E in accordance with the transfercycle and mechanism above decribed with each core driven in the samerelative phase as the O, A and E cores notwithstanding subscript.

The significance of cores 11 and 11' is that core 11 includes a fluxcapacity substantially different from the flux capacity of the leg ofcore 0 coupled by the coupling loop. In terms of the normalized fluxquantities heretofore described, the 0 core leg adjacent T has a fluxcapacity of qb l and core 11 has a flux capacity of =L The core 11' isslightly smaller than core 11 and has a flux capacity 1, but stillsutficient to set a succeeding core; i.e. core E Considering now theoperation of the circuit of FIGURE 3 and referring to the schedule ofFIG- URE 2, the particular core states and flux units transferred aresimilar and cores A A E and E may be considered to follow exactly theschedule in FIGURE 2 shown for cores A and E. Thus, with the cores in aninitial state of clear, set and clear for O, A and E cores,respectively, the input of a zero via loop 46 to core 0 followed byprime on lead 44 and by the ADV. 0 pulse on lead 40 will result in thecores E and E being set by the units :l and 1 with the core 0 and thecores A and A being cleared. Since core A has a normalized unit fluxequal to one, the input via loop 48 into core E may be considered as asufficient for a full MAD set as above described, to thus produce anoutput of one on loop 50. The setting of core E however, is due to theunit of flux A 1 switched in core A coupled by loop 49 and thereforecore E will be driven to have a quantity of flux switched less than thatof a full MAD set and thereby produce an output of one on loop 51 of areduced voltage level. The following application of ADV. E via lead 42will operate to clear cores E and E and set cores A and A FIGURE 4depicts the pulse levels for input and output pulses occurringresponsive to the above half cycle. Thus, it will be seen that the inputof a zero produces an output at core E of a slightly lower level thanthat at core E, but still representative of a one. In essence, the unitflux transfer is such that the outputs are proportionately different.

Considering now the input of a one such as the level shown for one inputto core 0 in FIGURE 4, the following application of prime on lead 44will prime core 0 and the application of ADV. O on lead 40 will clearcore 0 and at the same time produce flux units operating on loops 48 and49 of =l. Cores A and A will be driven by ADV. 0 into the clear state toproduce flux units =1 and l. As a result of this core E will receivesubstantially zero flux and core E will receive a quantity of flux whichis the difference between the normalized units 5 and The fluxtransferred to core E is however, in the clearing sense because loop 49is wound with respect to core 0 to produce a clearing responsive to atransfer from core 0 to E This means that core E will, if anything, bedriven further into negative saturation than it would have been if coreA were of substantially the same flux capacity as the outer leg of core0. The outputs on loops S0 and 51 linking cores E and E would be of thelevels indicated in FIGURE 4. As will be apparent, the output on loop 51is a negative output and the output on loop 50 is a typical zero output.The significance of this is that the discrimination between one and zerolevels for the output on loop 51 from the E core is far better than thediscrimination between the one and zero output on loop 50 of core EActual use shows that by having the flux capacity of core A ten totwenty percent less than the flux capacity of core A and the outer legof core 0, the discrimination between one and zero can be improved fromfour or five to one up to infinity insofar as may be determined bymeasuring the difference on an oscilloscope or driving any unilateraldevice.

It will be readily appreciated by those skilled in the art that thedegree of one-zero discrimination required for different uses is animportant consideration. For example, with respect to utility devicessuch as certain lamps, types of relays or semi-conductors, the mostsignificant requirement is that the one voltage level be as large aspossible with one-zero discrimination being of secondary importance.With respect to certain other applications, the one level need not beparticularly high and the important consideration is that ofdiscrimination between one and zero. It should be readily appreciatedthat if the actual output zero is a negative quantity, thediscrimination with respect to a positive one of a slightly reducedamplitude becomes, practically speaking, absolute.

FIGURE 5 shows an alternative embodiment providing a plurality ofdifferent outputs occurring at different times and having differentdegrees of discrimination. The cores A and E are identical to the coresshown in FIGURE 1 and the operation of the cores with respect toproviding a complement of the output from a preceding 0 core may betaken to be the same. The advance turns N, and N linking core A havebeen left out for clarity.

The core E is threaded by an ADV. E lead 60 having turns N linking thecore major aperture 12 and turns N linking the output minor aperture Tto provide clearing M.M.F.s about the core major path and about the pathsurrounding aperture T A prime lead 6?. is provided, linking aperture Tin a sense to apply priming from turns N The coupling loop from the Upreceding 0 core shown as 64, is identical to the coupling loop 28,shown with respect to the circuit of FIG- URE 1.

Further linking core E are output coupling loops 66, 76 and 74 toprovide complement outputs of distinctly different characteristics. Loop66 threads aperture T about the outer leg thereof to provide a standardMAD-R or dynamic output occurring at ADV. E time. In the mannerheretofore indicated, the output on loop 66 is preceded by ADV. Otransferring the complement of the intelligence state stored in thepreceding 0 core to the E core and by the energization of prime lead 62.Since the priming applied via lead 62 substantially saturates thematerial in the outer leg adjacent T in a positive sense, theapplication of ADV. E on lead 60 produces an output pulse on 66 whereinthe one-zero discrimination is approximately that of the standard MAD-Rsystem.

The drive lead 68 and the output loop 70 associated therewith, arethreaded in FIGURE 8 fashion through an available minor aperture 14, toprovide a static output, which appears continuously to indicate theinstantaneous intelligence state of core E, which is the complement ofthe intelligence train being fed through the preceding core 0. Theparticular drive turns and operation associated with 68 and 70 arepreferably as described in application Serial Number 249,466 abovementioned. The turns of leads 68 and 70- are such that the instantaneousstate of core E is available as long as the RF is applied to 68. Theutility device 72 shown here as a signal lamp, could of course be someother utilization device including a relay or the like. The RF appliedto 68, may be gated to, in effect, sample the state of core E at anytime on command.

Considering that the RF is constantly applied and that a train ofone-zero intelligence pulses is being fed through the preceding 0 core,lamp 72 is lighted each time the ADV. 0 phase transfers a zero from thepreceding 0 core to thus indicate the zero complement of one. Lamp 72remains lighted until the following ADV. E phase which clears core E.The transfer of a one from the preceding 0 core to the E core causeslamp 72 to be extinguished and remain extinguished until the nexttransfer of a zero from the preceding 0 core by the ADV. 0 phase.

The output winding 74 provides a dynamic output each time core E isdriven by ADV. O in the same manner :as the output loop 30, 50 and 51,heretofore described. As indicated in FIGURE 5, the polarities of outputcurrents from loops 66 and 74 are in an opposite sense as well as atdifferent times. This in itself has been found to be highly useful inorder to drive different utilization devices at different times.

The operation of the circuit of FIGURE 5 would thus provide thepossibility of a dynamic complement output occurring at ADV. 0 time onloop 74 with excellent discrimination between one and zero and a reducedone voltage level, a dynamic output on loop 66 of standarddiscrimination occurring at ADV. E time with slightly greater maximumvoltage level and a static output from loop 76 constantly monitoring thestate of the E core. As will be appreciated by those familiar withintelligence transfer problems, the availability of duplicatecomplements at the same time or at different times can be quite useful;particularly with respect to error checking codes.

The embodiments in FIGURE 1 and 3, with respect to the flux content ofthe auxiliary core, should make it apparent that the inventioncontemplates providing auxiliary cores of a particular flux contentrelative to the flux content of the preceding core transmitting legdependent upon the discrimination required and the gain characteristicsof the circuit. In the first example shown, the auxiliary core includeda flux content substantially equal to the outer leg of the preceding 0core, and the second example indicated the use of two auxiliary coreswherein one core has flux content substantially the same and the othercore has a flux content slightly less than that of the preceding core.With respect to the circuit of the invention, it is contemplated thatthe auxiliary core could have a flux content greater than that of thetransmitting leg of the preceding 0 core in order to boost the oneoutput level even higher with a concomitant sacrifice of discriminationwith respect to a boosted zero level. For example, in FIGURE 1, the fluxcontent of core A could be ten to twenty percent higher than that of theouter leg of core 0. It is also fully contemplated that a given A coremay be made up of a plurality of cores having the net flux content orcapacity required. For

example, a core having a twenty maxwells flux content could be replacedby five cores each having a flux content of four maxwells with the fivelinked by drive and coupling windings in the same manner as the singlecore.

From the description heretofore given, it should also be apparent that Ecore or cores need not be multiaperture cores unless dynamic (ADV.E-prime) or RF output is required. The E core or cores could otherwisebe simple torroids having a flux content similar to core A; i.e.sufficient to produce a one level similar to standard MADR outputs.

Changes in construction will occur to those skilled in the art andvarious apparently different modifications and embodiments may be madewithout departing from the scope of the invention. The matter set forthin the foregoing description and accompanying drawings is offered by wayof illustration only. The actual scope of the invention is intended tobe defined in the following claims when viewed in their properperspective against the prior art.

I claim:

1. A negation device for producing the binary complement output of abinary input comprised of cores of magnetic material having square loophysteresis characteristics including an input core, an output core and asource core with winding means linking the input and output cores fortransferring intelligence states into and out of said device,respectively, advance windings linking said cores to sequentially clearand set the input and source cores and set and clear the source andoutput cores, a coupling loop linking the input, output and source coresin a sense such that upon the input core being cleared from a set statethe source core will be set from a clear state to produce a net fluxchange in the output core representative of zero and upon the input corebeing cleared from a clear state, the source core will be cleared from aset state to produce a net flux switched in the output corerepresentative of one whereby the output core will produce an outputwhich is the complement of the input to the input core.

2. The device of claim 1, wherein the cores are of substantiallyidentical magnetic material.

3. The device of claim 1, wherein the cores are threaded by a resetwinding linking the input, source and output cores in a sense to drivesuch cores into respective states of clear, set and clear response toenergization of said reset winding.

4. The device of claim 1, wherein the source core has a flux contentsubstantially equal to the flux content of that portion of the inputcore linked by the coupling loop.

5. The device of claim 1, wherein the source core has a flux contentless than the flux content of that portion of the input core linked bythe coupling loop.

6. The device of claim 1, wherein the source core has a flux contentgreater than that portion of the input core linked by the coupling loop.

7. The device of claim 1, wherein the advance winding, which is operableto set the source core, threads the input core in a sense to opposemagnetomotive forces developed in the coupling loop linking the inputcore with the output core during phases of the advance cycle wherein thesaid output core is cleared and the source core is set.

8. The device of claim 1, wherein there is further included anadditional source core and an additional output core threaded by theadvance windings and linked by a further coupling loop in a sense suchthat upon the input core being cleared from the set state, theadditional source core will be set from a clear state to produce a netflux change in the additional output core representative of zero andupon the input core being cleared from a clear state, the additionalsource core will be cleared from a set state to produce a net fluxswitched in the additional output core representative of one whereby theadditional output core will produce an output which is the complement ofthe input to the input core.

9. The device of claim 8, wherein the first mentioned source core has aflux content substantially equal to the flux content of that portion ofthe input core linked by the coupling loop, and the additional sourcecore has a different flux content whereby the one-zero discriminationoutput from the output cores is different.

16. The device of claim 9, wherein the flux content of the additionalsource core is less than that of the first mentioned source core suchthat the one-Zero discrimination of the output from the additionaloutput core is greater than that from the first mentioned output core.

11. An improved logic device operable to produce an output which is thecomplement of a zero or one binary intelligence input comprising incombination, an input core, a source core and an output core, advancewindings linking said cores adapted to drive the magnetic materialthereof into cleared states of magnetization responsive to advancepulses applied thereto, a portion of said advance winding linking saidsource core adapted to drive the magnetic material thereof into clearand set states of magnetization responsive to said advance pulses, aninput winding linking said input core adapted to drive said core intoone or zero intelligence states of magnetization, an output windinglinking said output core adapted to produce one or zero output pulsesresponsive to flux switched in said output core, a coupling windinglinking said input core, said source core and said output core in arespective sense to produce magnetomotive forces operating on saidoutput core proportional to the net flux switched in the input core andthe source core responsive to the application of an advance pulsewhereby responsive to the input of a one, the output core will be leftcleared by the cancellation of flux switched in the input core and inthe source core and whereby responsive to the input of a zero, theoutput core will be set responsive to the flux switched in the sourcecore.

12. The device of claim 11, wherein the said advance windings linkingthe cores include separate advance circuits linking respectively, theinput core and the output core with a source of phased advance pulses todrive said cores into cleared states of magnetization at intervals.

13. The device of claim 12, wherein the said output winding linking theoutput core is threaded through a major aperture thereof to produce aOne or zero output pulse responsive to the advance pulse clearing theinput core.

14. The device of claim 13, wherein there is further included a primewinding linking the input and output cores through a transmittingaperture thereof and adapted to at times prime the flux into the outerleg adjacent said transmitting aperture responsive to the application ofprime pulses and there is included a further output winding linking thesaid outer leg adapted to produce one or zero output pulses responsiveto the output core being cleared by the advance pulse applied to theoutput core.

15. The device of claim 14, wherein there is further included linkinganother minor aperture, an RF drive winding and a further output windingadapted to produce a static output representative of the particularintelligence state of the output core.

16. An improved logic circuit of cores of similar magnetic material andcopper wire only, including an input core, an output core and a sourcecore, the input and output cores having a major aperture and a pluralityof minor apertures, a first winding threading the input core and thesource core in a sense to clear both cores responsive to a first advancepulse, a second winding threading the output core and the source core ina sense to clear the output core and set the source core responsive to asecond advance pulse, a coupling loop threading a minor aperture of theinput core and a minor and major aperture of the output core in a senseto clear the output core responsive to flux switched under such loop asthe input core is cleared, the said coupling loop threading the sourcecore in a sense .to develop a flux switched producing a current in asense to set the output core responsive to the source core beingcleared, and set the input core responsive to the source core being set,an output Winding linking said output core whereby, upon the input corebeing set and cleared, the output core will be driven by a magnetomotiveforce leaving the output core in a clear state to produce a zero outputon said output winding responsive to flux switched during theapplication of an advance pulse and upon the input core being left inthe clear state by the input of a zero and the output core will be setby the source core to produce -a one output on said output windingresponsive to flux switched during the application of an advance pulse.

17. The circuit of claim 16, wherein the second winding threads .thesaid minor aperture of the input core in a sense to produce amagnetomotive force opposing the magnetomotive force developed by thecoupling loop as the output core is cleared from the set state and thesource core is set from the clear state.

18. The circuit of claim 16, wherein the said output winding threads afurther minor aperture of said output core and there is included a primeWinding adapted to prime flux under said Winding if the output core isset, the said output core producing one or zero outputs on said outputwinding during the application of said second advance pulse.

No references cited.

BERNARD KONICK, Primary Examiner.

G. LIEBERSTEIN, Assistant Examiner.

1. A NEGATION DEVICE FOR PRODUCING THE BINARY COMPLEMENT OUTPUT OF ABINARY INPUT COMPRISED OF CORES OF MAGNETIC MATERIAL HAVING SQUARE LOOPHYSTERESIS CHARACTERISTICS INCLUDING AN INPUT CORE, AN OUTPUT CORE AND ASOURCE CORE WITH WINDING MEANS LINKING THE INPUT AND OUTPUT CORES FORTRANSFERRING INTELLIGENCE STATES INTO AND OUT OF SAID DEVICE,RESPECTIVELY, ADVANCE WINDINGS LINKING SAID CORES TO SEQUENTIALLY CLEARAND SET THE INPUT AND SOURCE CORES AND SET AND CLEAR THE SOURCE ANDOUTPUT CORES, A COUPLING LOOP LINKING THE INPUT, OUTPUT AND SOURCE CORESIN A SENSE SUCH THAT UPON THE INPUT CORE BEING CLEARED FROM A SET STATETHE SOURCE CORE WILL BE SET FROM A CLEAR STATE TO PRODUCE A NET FLUXCHANGE IN THE OUTPUT CORE REPRESENTATIVE OF ZERO AND UPON THE INPUT COREBEING CLEARED FROM A CLEAR STATE, THE SOURCE CORE WILL BE CLEARED FROM ASET STATE TO PRODUCE A NET FLUX SWITCHED IN THE OUTPUT COREREPRESENTATIKVE OF ONE WHEREBY THE OUTPUT CORE WILL PRODUCE AN OUTPUTWHICH IS THE COMPLEMENT OF THE INPUT TO THE INPUT CORE.